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Input/Output

Module by: Nguyen Thi Hoang Lan

  1. I/O Overview
The computer system’s I/O architecture is its interface to the outside world. The I/O components consist the buses, the keybroads, CRT Minitor, Flat panel display, scanner, modem …The I/O architecture consiste the buses and a set of I/O modules, each module interfaces to the bus system or to the outside world.
  • There are 3 principal I/O techniques:
- Programmed I/O
- Interrupt-dreiven I/O
- Direct Memory Access (DMA)
  • There are two I/O techniques.
I/O parallel
I/O serial
  1. Buses
The collection of paths that connect the system modules together form the interconnection structure.
  • Bus Interconnection
Computer systems contain a number of buses that provide pathways between
components
– Shared transmission media connecting 2 or more devices together
– Broadcast, 1-to-all operation
– Must insure only 1 device places information onto a bus at any given time
  • Typical buses consist of 50-100 lines
- Address information (address bus)
Specifies source/destination of data transfer
Width determines the capacity of the system
– Data information (data bus)
Width is key in determining overall performance
– Control information: Controls access to and use of the address and data bus
– Miscellaneous: power, ground, clock
  • Bus performance and limitations
The performance is limited by:
+ Data propagation delay through the bus longer buses (to support more devices) require longer delays
+ Aggregate demand for access to the bus from all devices connected to the bus
multiple buses To avoid bottlenecks,
  • Multiple Buses:
– Hierarchical
– High-speed limited access buses close to the processor
– Slower-speed general access buses farther away from the processor.
  • External Bus - PC bus
ISA (Industrial Standard Architecture)
– First open system bus architecture for PCs (meaning IBM-type machines)
– 8-bit and 16-bit ISA buses
Figure 1
Figure 13.2 ISA Bus
- Micro Channel Architecture
- PCI
  • VESA Video Local Bus
  • Bus architecture and organization
Figure 2
Figure 13.1 Hierarchical bus configurations

I/O Modules and InterfaceStructure

Programmed I/O

Interrup Drive I/O

Direct Memory Access

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